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1 LT1886 dual 700mhz, 200ma operational amplifier n 700mhz gain bandwidth n 200ma minimum i out n low distortion: C72dbc at 1mhz, 4v p-p , 25 w , a v = 2 n stable in a v 3 10, simple compensation for a v < 10 n 4.3v minimum output swing, v s = 6v, r l = 25 w n 7ma supply current per amplifier n 200v/ m s slew rate n stable with 1000pf load n 6nv/ ? hz input noise voltage n 2pa/ ? hz input noise current n 4mv maximum input offset voltage n 4 m a maximum input bias current n 400na maximum input offset current n 4.5v minimum input cmr, v s = 6v n specified at 6v, 2.5v the lt ? 1886 is a 200ma minimum output current dual op amp with outstanding distortion performance. the ampli- fiers are gain-of-ten stable, but can be easily compensated for lower gains. the LT1886 features balanced, high impedance inputs with 4 m a maximum input bias current, and 4mv maximum input offset voltage. single supply applications are easy to implement and have lower total noise than current feedback amplifier implementations. the output drives a 25 w load to 4.3v with 6v supplies. on 2.5v supplies the output swings 1.5v with a 100 w load. the amplifier is stable with a 1000pf capacitive load which makes it useful in buffer and cable driver applications. the LT1886 is manufactured on linear technologys advanced low voltage complementary bipolar process and is available in a thermally enhanced so-8 package. n dsl modems n xdsl pci cards n usb modems n line drivers single 12v supply adsl modem line driver , ltc and lt are registered trademarks of linear technology corporation. + 1/2 LT1886 12.4 1:2* 12v 909 100 100 20k 10k in in + 10k 20k 1 f 1 f 0.1 f 0.1 f + 1/2 LT1886 12.4 1886 ta01 909 100 *coilcraft x8390-a or equivalent applicatio s u features typical applicatio u descriptio u adsl modem line driver distortion line voltage (v p-p ) 0 harmonic distortion (dbc) ?0 ?0 ?0 ?0 100 1886 ta01a 2 4 6 8 10 12 14 16 v s = 12v a v = 10 f = 200khz 100 line 1:2 transformer hd2 hd3
2 LT1886 wu u package / o rder i for atio LT1886cs8 t jmax = 150 c, q ja = 80 c/w (note 4) order part number consult factory for industrial and military grade parts. electrical characteristics the l denotes specifications which apply over the full operating temp- erature range, otherwise specifications are at t a = 25 c. v s = 6v, v cm = 0v, pulse power tested unless otherwise noted. (note 9) symbol parameter conditions min typ max units v os input offset voltage (note 5) 1 4 mv l 5mv input offset voltage drift (note 8) l 317 m v/ c i os input offset current 150 400 na l 600 na i b input bias current 1.5 4 m a l 6 m a e n input noise voltage f = 10khz 6 nv/ ? hz i n input noise current f = 10khz 2 pa/ ? hz r in input resistance v cm = 4.5v 5 10 m w differential 35 k w c in input capacitance 2pf input voltage range (positive) l 4.5 5.9 v input voltage range (negative) l C5.2 C4.5 v cmrr common mode rejection ratio v cm = 4.5v l 77 98 db minimum supply voltage guaranteed by psrr l 2v psrr power supply rejection ratio v s = 2v to 6.5v 80 86 db l 78 db a vol large-signal voltage gain v out = 4v, r l = 100 w 5.0 12 v/mv l 4.5 v/mv v out = 4v, r l = 25 w 4.5 12 v/mv l 4.0 v/mv v out output swing r l = 100 w , 10mv overdrive 4.85 5 v l 4.70 v r l = 25 w , 10mv overdrive 4.30 4.6 v l 4.10 v i out = 200ma, 10mv overdrive 4.30 4.5 v l 4.10 v i sc short-circuit current (sourcing) (note 3) 800 ma short-circuit current (sinking) 500 ma s8 part marking 1886 1 2 3 4 8 7 6 5 top view v + out b in b +in b out a in a +in a v s8 package 8-lead plastic so b a absolute m axi m u m ratings w ww u (note 1) total supply voltage (v + to v C ) ........................... 13.2v input current (note 2) ....................................... 10ma input voltage (note 2) ............................................ v s maximum continuous output current (note 3) dc ............................................................... 100ma ac ............................................................... 300ma operating temperature range (note 10) C 40 c to 85 c specified temperature range (note 9) .. C 40 c to 85 c maximum junction temperature ......................... 150 c storage temperature range ................ C 65 c to 150 c lead temperature (soldering, 10 sec)................. 300 c
3 LT1886 electrical characteristics the l denotes specifications which apply over the full operating temp- erature range, otherwise specifications are at t a = 25 c. v s = 6v, v cm = 0v, pulse power tested unless otherwise noted. (note 9) symbol parameter conditions min typ max units the l denotes specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v s = 2.5v, v cm = 0v, pulse power tested unless otherwise noted. (note 9) symbol parameter conditions min typ max units v os input offset voltage (note 5) 1.5 5 mv l 6mv input offset voltage drift (note 8) l 517 m v/ c i os input offset current 100 350 na l 550 na i b input bias current 1.2 3.5 m a l 5.5 m a e n input noise voltage f = 10khz 6 nv/ ? hz i n input noise current f = 10khz 2 pa/ ? hz r in input resistance v cm = 1v 10 20 m w differential 50 k w c in input capacitance 2pf input voltage range (positive) l 1 2.4 v input voltage range (negative) l C1.7 C1 v cmrr common mode rejection ratio v cm = 1v l 75 91 db a vol large-signal voltage gain v out = 1v, r l = 100 w 5.0 10 v/mv l 4.5 v/mv v out = 1v, r l = 25 w 4.5 10 v/mv l 4.0 v/mv v out output swing r l = 100 w , 10mv overdrive 1.50 1.65 v l 1.40 v r l = 25 w , 10mv overdrive 1.35 1.50 v l 1.25 v i out = 200ma, 10mv overdrive 0.87 1 v l 0.80 v sr slew rate a v = C10 (note 6) 133 200 v/ m s l 110 v/ m s full power bandwidth 4v peak (note 7) 8 mhz gbw gain bandwidth f = 1mhz 700 mhz t r , t f rise time, fall time a v = 10, 10% to 90% of 0.1v, r l = 100 w 4ns overshoot a v = 10, 0.1v, r l = 100 w 1% propagation delay a v = 10, 50% v in to 50% v out , 0.1v, r l = 100 w 2.5 ns t s settling time 6v step, 0.1% 50 ns harmonic distortion hd2, a v = 10, 2v p-p , f = 1mhz, r l = 100 w /25 w C 75/C 63 dbc hd3, a v = 10, 2v p-p , f = 1mhz, r l = 100 w /25 w C 85/C 71 dbc imd intermodulation distortion a v = 10, f = 0.9mhz, 1mhz, 14dbm, r l = 100 w /25 w C 81/C 80 dbc r out output resistance a v = 10, f = 1mhz 0.1 w channel separation v out = 4v, r l = 25 w 82 92 db l 80 db i s supply current per amplifier 7 8.25 ma l 8.50 ma
4 LT1886 electrical characteristics the l denotes specifications which apply over the full operating temp- erature range, otherwise specifications are at t a = 25 c. v s = 2.5v, v cm = 0v, pulse power tested unless otherwise noted. (note 9) symbol parameter conditions min typ max units note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: the inputs are protected by back-to-back diodes. if the differential input voltage exceeds 0.7v, the input current should be limited to less than 10ma. note 3: a heat sink may be required to keep the junction temperature below absolute maximum. note 4: thermal resistance varies depending upon the amount of pc board metal attached to the device. q ja is specified for a 2500mm 2 test board covered with 2 oz copper on both sides. note 5: input offset voltage is exclusive of warm-up drift. note 6: slew rate is measured between 2v on a 4v output with 6v supplies, and between 1v on a 1.5v output with 2.5v supplies. note 7: full power bandwidth is calculated from the slew rate: fpbw = sr/2 p v p . note 8: this parameter is not 100% tested. note 9: the LT1886c is guaranteed to meet specified performance from 0 c to 70 c. the LT1886c is designed, characterized and expected to meet specified performance from C40 c to 85 c but is not tested or qa sampled at these temperatures. for guaranteed i-grade parts, consult the factory. note 10: the LT1886c is guaranteed functional over the operating temperature range of C40 c to 85 c. i sc short-circuit current (sourcing) (note 3) 600 ma short-circuit current (sinking) 400 ma sr slew rate a v = C10 (note 6) 66 100 v/ m s l 60 v/ m s full power bandwidth 1v peak (note 7) 16 mhz gbw gain bandwidth f = 1mhz 530 mhz t r , t f rise time, fall time a v = 10, 10% to 90% of 0.1v, r l = 100 w 7ns overshoot a v = 10, 0.1v, r l = 100 w 5% propagation delay a v = 10, 50% v in to 50% v out , 0.1v, r l = 100 w 5ns harmonic distortion hd2, a v = 10, 2v p-p , f = 1mhz, r l = 100 w /25 w C 75/C 64 dbc hd3, a v = 10, 2v p-p , f = 1mhz, r l = 100 w /25 w C 80/C 66 dbc imd intermodulation distortion a v = 10, f = 0.9mhz, 1mhz, 5dbm, r l = 100 w /25 w C 77/C 85 dbc r out output resistance a v = 10, f = 1mhz 0.2 w channel separation v out = 1v, r l = 25 w 82 92 db l 80 db i s supply current per amplifier 5 5.75 ma l 6.25 ma typical perfor a ce characteristics uw supply current vs temperature input common mode range vs supply voltage input bias current vs input common mode voltage temperature ( c) 50 25 0 25 50 75 100 125 supply current (ma) 1886 g01 15 10 5 0 v s = 6v v s = 2.5v total supply voltage (v) 0 2 4 6 8 10 12 14 common mode range (v) 1886 g02 v + 0.1 0.2 0.3 1.5 1.0 0.5 v t a = 25 c ? v os > 1mv input common mode voltage (v) ? ? 2 ? 0 4 6 input bias current ( a) 1886 g03 3.0 2.5 2.0 1.5 1.0 0.5 0 t a = 25 c i b = (i b + + i b )/2 v s = 6v v s = 2.5v
5 LT1886 typical perfor a ce characteristics uw input bias current vs temperature input noise spectral density output short-circuit current vs temperature output saturation voltage vs temperature, v s = 6v output saturation voltage vs temperature, v s = 2.5v settling time vs output step gain and phase vs frequency gain bandwidth vs supply voltage output impedance vs frequency temperature ( c) 50 25 0 25 50 75 100 125 input bias current ( a) 1886 g04 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 v s = 6v v s = 2.5v i b = (i b + + i b )/2 frequency (hz) 10 1 input voltage noise (nv/ hz) 10 100 input current noise (pa/ hz) 10 1 100 1k 100k 100 10k 1886 g05 e n t a = 25 c a v = 101 i n temperature ( c) 50 25 0 25 50 75 100 125 output short-circuit current (ma) 1886 g06 1000 900 800 700 600 500 400 300 200 100 0 source, v s = 6v source, v s = 2.5v sink, v s = 6v sink, v s = 2.5v ? v in = 0.2v temperature ( c) 50 25 0 25 50 75 100 125 output saturation voltage (v) 1886 g07 v + 0.5 1.0 1.5 1.5 1.0 0.5 v r l = 100 r l = 100 i l = 150ma i l = 200ma i l = 150ma i l = 200ma temperature ( c) 50 25 0 25 50 75 100 125 output saturation voltage (v) 1886 g08 v + 0.5 1.0 1.5 1.5 1.0 0.5 v r l = 100 r l = 100 i l = 150ma i l = 200ma i l = 150ma i l = 200ma settling time (ns) 02040 10 30 50 60 output step (v) 1886 g09 6 4 2 0 ? ? ? v s = 6v 10mv 1mv 10mv 1mv frequency (hz) 1m gain (db) 80 70 60 50 40 30 20 10 0 ?0 ?0 phase (deg) 100 80 60 40 20 0 ?0 ?0 ?0 ?0 100 10m 100m 1g 1886 g10 t a = 25 c a v = 10 r l = 100 v s = 6v v s = 2.5v v s = 6v phase gain v s = 2.5v total supply voltage (v) 0 gain bandwidth (mhz) 1886 g11 2 4 6 8 10 12 14 800 700 600 500 400 300 t a = 25 c a v = 10 r l = 100 r l = 25 r l = 1k frequency (hz) 1 0.1 output impedance ( ) 10 100k 10m 100m 1886 g12 0.01 1m 100 a v = 100 a v = 10
6 LT1886 typical perfor a ce characteristics uw frequency response vs supply voltage, a v = 10 frequency response vs supply voltage, a v = C10 frequency response vs supply voltage, a v = 2 frequency response vs supply voltage, a v = C1 frequency response vs capacitive load slew rate vs temperature power supply rejection vs frequency common mode rejection ratio vs frequency amplifier crosstalk vs frequency frequency (hz) gain (db) 1m 100m 1g 1886 g13 10m 23 22 21 20 19 18 17 16 15 14 13 v s = 6v t a = 25 c a v = 10 r l = 100 v s = 2.5v frequency (hz) gain (db) 1m 100m 1g 1886 g14 10m 23 22 21 20 19 18 17 16 15 14 13 v s = 6v t a = 25 c a v = 10 r l = 100 v s = 2.5v frequency (hz) gain (db) 1m 100m 1g 1886 g15 10m 9 8 7 6 5 4 3 2 1 0 ? v s = 6v t a = 25 c a v = 2 r l = 100 r f = r g = 1k r c = 124 c c = 100pf see figure 3 v s = 2.5v frequency (hz) gain (db) 1m 100m 1g 1886 g16 10m 3 2 1 0 ? ? ? ? ? ? ? v s = 6v t a = 25 c a v = 1 r l = 100 r f = r g = 1k r c = 124 c c = 100pf see figure 2 v s = 2.5v frequency (hz) gain (db) 1m 100m 1g 1886 g17 10m 38 35 32 29 26 23 20 17 14 11 8 v s = 6v t a = 25 c a v = 10 no r l 1000pf 500pf 200pf 100pf 50pf temperature ( c) 50 25 0 25 50 75 100 125 slew rate (v/ s) 1886 g18 350 300 250 200 150 100 50 0 +sr ?r +sr ?r v s = 6v v s = 2.5v a v = 10 r l = 100 frequency (hz) power supply rejection (db) 100k 10m 100m 1886 g19 1m 100 90 80 70 60 50 40 30 20 10 0 (+) supply v s = 6v a v = 10 (? supply frequency (hz) common mode rejection ratio (db) 100k 10m 100m 1886 g20 1m 100 90 80 70 60 50 40 30 20 10 0 v s = 6v t a = 25 c frequency (hz) output to input crosstalk (db) 1m 100m 1g 1886 g21 10m 0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 100 v s = 6v a v = 10 r l = 100 input = 20dbm b ? a a ? b
7 LT1886 typical perfor a ce characteristics uw harmonic distortion vs frequency, a v = 10, v s = 6v harmonic distortion vs frequency, a v = 10, v s = 2.5v harmonic distortion vs resistive load harmonic distortion vs resistive load harmonic distortion vs output swing, a v = 10, v s = 6v harmonic distortion vs output swing, a v = 10, v s = 2.5v harmonic distortion vs output swing, a v = 2, v s = 6v harmonic distortion vs output swing, a v = 2, v s = 2.5v harmonic distortion vs output current, v s = 6v frequency (hz) 100k distortion (dbc) 0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 100 1m 10m 1886 g22 t a = 25 c a v = 10 2v p-p out 2nd 3rd 2nd 3rd r l = 25 r l = 100 frequency (hz) 100k distortion (dbc) 0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 100 1m 10m 1886 g23 t a = 25 c a v = 10 2v p-p out 2nd 3rd 2nd 3rd r l = 100 r l = 25 load resistance ( ) distortion (dbc) 1 100 1k 1886 g24 10 0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 100 t a = 25 c v s = 6v a v = 10 2v p-p out f = 1mhz 2nd 3rd load resistance ( ) distortion (dbc) 1 100 1k 1886 g25 10 0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 100 t a = 25 c v s = 2.5v a v = 10 2v p-p out f = 1mhz 2nd 3rd output voltage (v p-p ) distortion (dbc) 024681012 1886 g26 0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 100 t a = 25 c f = 1mhz 2nd 3rd 2nd 3rd r l = 25 r l = 100 output voltage (v p-p ) distortion (dbc) 0 1886 g27 0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 100 1 2 3 4 5 t a = 25 c f = 1mhz 2nd 3rd 2nd 3rd r l = 25 r l = 100 output voltage (v p-p ) distortion (dbc) 024681012 1886 g28 0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 100 t a = 25 c r f = r g = 1k r c = 124 c c = 100pf f = 1mhz see figure 3 2nd 2nd 3rd 3rd r l = 25 r l = 100 output voltage (v p-p ) distortion (dbc) 0 1886 g29 0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 100 1 2 3 4 5 2nd 3rd 2nd 3rd r l = 100 t a = 25 c r f = r g = 1k r c = 124 c c = 100pf f = 1mhz see figure 3 r l = 25 peak output current (ma) highest harmonic distortion (dbc) 0 1886 g30 ?0 ?0 ?0 ?0 ?0 ?0 100 200 300 400 500 r l = 5 r l = 10 t a = 25 c a v = 10 f = 1mhz r l = 25
8 LT1886 typical perfor a ce characteristics uw harmonic distortion vs output current, v s = 2.5v undistorted output swing vs frequency small-signal transient, a v = 10 small-signal transient, a v = C10 small-signal transient, a v = 10, c l = 1000pf large-signal transient, a v = 10 large-signal transient, a v = C10 large-signal transient, a v = 10, c l = 1000pf peak output current (ma) highest harmonic distortion (dbc) 0 1886 g30 ?0 ?0 ?0 ?0 ?0 ?0 50 100 150 200 250 r l = 5 r l = 10 t a = 25 c a v = 10 f = 1mhz r l = 25 frequency (hz) 100k output voltage swing (v p-p ) 12 10 8 6 4 2 0 1m 10m 1886 g32 t a = 25 c a v = 10 r l = 100 1% distortion v s = 2.5v v s = 6v 1886 g33 1886 g34 1886 g35 1886 g36 1886 g37 1886 g38
9 LT1886 input considerations the inputs of the LT1886 are an npn differential pair protected by back-to-back diodes (see the simplified schematic). there are no series protection resistors onboard which would degrade the input voltage noise. if the inputs can have a voltage difference of more than 0.7v, the input current should be limited to less than 10ma with external resistance (usually the feedback resistor or source resistor). each input also has two esd clamp diodesone to each supply. if an input drive exceeds the supply, limit the current with an external resistor to less than 10ma. the LT1886 design is a true operational amplifier with high impedance inputs and low input bias currents. the input offset current is a factor of ten lower than the input bias current. to minimize offsets due to input bias currents, match the equivalent dc resistance seen by both inputs. the low input noise current can significantly reduce total noise compared to a current feedback amplifier, especially for higher source resistances. layout and passive components with a gain bandwidth product of 700mhz the LT1886 requires attention to detail in order to extract maximum performance. use a ground plane, short lead lengths and a combination of rf-quality supply bypass capacitors (i.e., 470pf and 0.1 m f). as the primary applications have high drive current, use low esr supply bypass capacitors (1 m f to 10 m f). for best distortion performance with high drive current a capacitor with the shortest possible trace lengths should be placed between pins 4 and 8. the optimum location for this capacitor is on the back side of the pc board. the dsl driver demo board (dc304) for this part uses a taiyo yuden 10 m f ceramic (tmk432bj106mm). the parallel combination of the feedback resistor and gain setting resistor on the inverting input can combine with the input capacitance to form a pole which can cause frequency peaking. in general, use feedback resistors of 1k w or less. thermal issues the LT1886 enhanced q ja so-8 package has the v C pin fused to the lead frame. this thermal connection increases the efficiency of the pc board as a heat sink. the pcb material can be very effective at transmitting heat between the pad area attached to the v C pin and a ground or power plane layer. copper board stiffeners and plated through- holes can also be used to spread the heat generated by the device. table 1 lists the thermal resistance for several different board sizes and copper areas. all measurements were taken in still air on 3/32" fr-4 board with 2oz copper. this data can be used as a rough guideline in estimating thermal resistance. the thermal resistance for each appli- cation will be affected by thermal interactions with other components as well as board size and shape. table 1. fused 8-lead so package copper area (2oz) total topside backside copper area q ja 2500 sq. mm 2500 sq. mm 5000 sq. mm 80 c/w 1000 sq. mm 2500 sq. mm 3500 sq. mm 92 c/w 600 sq. mm 2500 sq. mm 3100 sq. mm 96 c/w 180 sq. mm 2500 sq. mm 2680 sq. mm 98 c/w 180 sq. mm 1000 sq. mm 1180 sq. mm 112 c/w 180 sq. mm 600 sq. mm 780 sq. mm 116 c/w 180 sq. mm 300 sq. mm 480 sq. mm 118 c/w 180 sq. mm 100 sq. mm 280 sq. mm 120 c/w 180 sq. mm 0 sq. mm 180 sq. mm 122 c/w calculating junction temperature the junction temperature can be calculated from the equation: t j = (p d )( q ja ) + t a t j = junction temperature t a = ambient temperature p d = device dissipation q ja = thermal resistance (junction-to-ambient) as an example, calculate the junction temperature for the circuit in figure 1 assuming an 85 c ambient temperature. the device dissipation can be found by measuring the supply currents, calculating the total dissipation and then subtracting the dissipation in the load. applicatio s i for atio wu u u
10 LT1886 applicatio s i for atio wu u u the dissipation for the amplifiers is: p d = (63.5ma)(12v) C (4v/ ? 2) 2 /(50) = 0.6w the total package power dissipation is 0.6w. when a 2500 sq. mm pc board with 2oz copper on top and bottom is used, the thermal resistance is 80 c/w. the junction temperature t j is: t j = (0.6w)(80 c/w) + 85 c = 133 c the maximum junction temperature for the LT1886 is 150 c so the heat sinking capability of the board is adequate for the application. if the copper area on the pc board is reduced to 180 sq. mm the thermal resistance increases to 122 c/w and the junction temperature becomes: t j = (0.6w)(122 c/w) + 85 c = 158 c which is above the maximum junction temperature indi- cating that the heat sinking capability of the board is inadequate and should be increased. capacitive loading the LT1886 is stable with a 1000pf capacitive load. the photo of the small-signal response with 1000pf load in a gain of 10 shows 50% overshoot. the photo of the large- signal response with a 1000pf load shows that the output slew rate is not limited by the short-circuit current. the typical performance curve of frequency response vs capacitive load shows the peaking for various capacitive loads. this stability is useful in the case of directly driving a coaxial cable or twisted pair that is inadvertently unterminated. for best pulse fidelity, however, a termina- tion resistor of value equal to the characteristic impedance of the cable or twisted pair (i.e., 50 w /75 w /100 w /135 w ) should be placed in series with the output. the other end of the cable or twisted pair should be terminated with the same value resistor to ground. compensation the LT1886 is stable in a gain 10 or higher for any supply and resistive load. it is easily compensated for lower gains with a single resistor or a resistor plus a capacitor. figure 2 shows that for inverting gains, a resistor from the inverting node to ac ground guarantees stability if the parallel combination of r c and r g is less than or equal to r f /9. for lowest distortion and dc output offset, a series capacitor, c c , can be used to reduce the noise gain at lower frequencies. the break frequency produced by r c and c c should be less than 15mhz to minimize peaking. the typical curve of frequency response vs supply voltage, a v = C1 shows less than 1db of peaking for a break frequency of 12.8mhz. + 6v ?v 909 100 100 + 1886 f01 1k 50 ?v 4v f = 1mhz figure 1. thermal calculation example r g r c v o v i c c (optional) + 1886 f02 r f = ? f r g v o v i < 15mhz 1 2 r c c c (r c || r g ) r f /9 figure 2. compensation for inverting gains figure 3 shows compensation in the noninverting configu- ration. the r c , c c network acts similarly to the inverting case. the input impedance is not reduced because the network is bootstrapped. this network can also be placed between the inverting input and an ac ground. another compensation scheme for noninverting circuits is shown in figure 4. the circuit is unity gain at low frequency and a gain of 1 + r f /r g at high frequency. the dc output offset is reduced by a factor of ten. the techniques of
11 LT1886 applicatio s i for atio wu u u figures 3 and 4 can be combined as shown in figure 5. the gain is unity at low frequencies, 1 + r f /r g at mid-band and for stability, a gain of 10 or greater at high frequencies. termination resistor is used, a capacitor to ground at the load can eliminate ringing. line driving back-termination the standard method of cable or line back-termination is shown in figure 6. the cable/line is terminated in its characteristic impedance (50 w , 75 w , 100 w , 135 w , etc.). a back-termination resistor also equal to to the chararacteristic impedance should be used for maximum pulse fidelity of outgoing signals, and to terminate the line for incoming signals in a full-duplex application. there are three main drawbacks to this approach. first, the power dissipated in the load and back-termination resistors is equal so half of the power delivered by the amplifier is wasted in the termination resistor. second, the signal is halved so the gain of the amplifer must be doubled to have the same overall gain to the load. the increase in gain increases noise and decreases bandwidth (which can also increase distortion). third, the output swing of the ampli- fier is doubled which can limit the power it can deliver to the load for a given power supply voltage. r c v o v i c c (optional) + 1886 f03 r f r g = 1 + r f r g v o v i < 15mhz 1 2 r c c c (r c || r g ) r f /9 output loading the LT1886 output stage is very wide bandwidth and able to source and sink large currents. reactive loading, even isolated with a back-termination resistor, can cause ring- ing at frequencies of hundreds of mhz. for this reason, any design should be evaluated over a wide range of output conditions. to reduce the effects of reactive loading, an optional snubber network consisting of a series rc across the load can provide a resistive load at high frequency. another option is to filter the drive to the load. if a back- figure 3. compensation for noninverting gains + 1886 f04 r f r g v i v o c c < 15mhz 1 2 r g c c r g r f /9 = 1 (low frequencies) (high frequencies) v o v i = 1 + r f r g figure 4. alternate noninverting compensation r c v o v i c c + 1886 f05 r f r g c big r f r g = 1 at low frequencies = 1 + at medium frequencies r f (r c || r g ) = 1 + at high frequencies v o v i figure 5. combination compensation + 1886 f06 r f r bt cable or line with characteristic impedance r l r g v o v i r l (1 + r f /r g ) = v o v i 1 2 r bt = r l an alternate method of back-termination is shown in figure 7. positive feedback increases the effective back- termination resistance so r bt can be reduced by a factor of n. to analyze this circuit, first ground the input. as r bt = r l /n, and assuming r p2 >>r l we require that: v a = v o (1 C 1/n) to increase the effective value of r bt by n. v p = v o (1 C 1/n)/(1 + r f /r g ) v o = v p (1 + r p2 /r p1 ) eliminating vp, we get the following: (1 + r p2 /r p1 ) = (1 + r f /r g )/(1 C 1/n) figure 6. standard cable/line back-termination
12 LT1886 applicatio s i for atio wu u u for example, reducing r bt by a factor of n = 4, and with an amplifer gain of (1 + r f /r g ) = 10 requires that r p2 /r p1 = 12.3. note that the overall gain is increased: v v rrr nrrrrr o i ppp fg p p p = + () + () + () [] -+ () [] 221 12 1 11 1 / // / / a simpler method of using positive feedback to reduce the back-termination is shown in figure 8. in this case, the drivers are driven differentially and provide complemen- tary outputs. grounding the inputs, we see there is invert- ing gain of Cr f /r p from Cv o to v a v a = v o (r f /r p ) and assuming r p >> r l , we require v a = v o (1 C 1/n) solving r f /r p = 1 C 1/n so to reduce the back-termination by a factor of 3 choose r f /r p = 2/3. note that the overall gain is increased to: v o /v i = (1 + r f /r g + r f /r p )/[2(1 C r f /r p )] adsl driver requirements the LT1886 is an ideal choice for adsl upstream (cpe) modems. the key advantages are: 200ma output drive with only 1.7v worst-case total supply voltage headroom, high bandwidth, which helps achieve low distortion, low quiescent supply current of 7ma per amplifier and a space-saving, thermally enhanced so-8 package. an adsl remote terminal driver must deliver an average power of 13dbm (20mw) into a 100 w line. this corre- sponds to 1.41v rms into the line. the dmt-adsl peak-to- average ratio of 5.33 implies voltage peaks of 7.53v into the line. using a differential drive configuration and trans- former coupling with standard back-termination, a trans- former ratio of 1:2 is well suited. this is shown on the front page of this data sheet along with the distortion perfor- mance vs line voltage at 200khz, which is beyond adsl requirements. note that the distortion is better than C73dbc for all swings up to 16v p-p into the line. the gain of this circuit from the differential inputs to the line voltage is 10. lower gains are easy to implement using the compensation techniques of figure 5. table 2 shows the drive requirements for this standard circuit. the above design is an excellent choice for desktop applications and draws typically 550mw of power. for portable applications, power savings can be achieved by reducing the back-termination resistor using positive feed- back as shown in figure 9. the overall gain of this circuit is also 10, but the power consumption has been reduced to 350mw, a savings of 36% over the previous design. note that the reduction of the back-termination resistor has allowed use of a 1:1 transformer ratio. + 1886 f07 r f r bt r p2 r p1 r g v i v a v p v o r l r f r g 1 + r l n = v o v i = 1 1 n for r bt = () r f r g 1 + () r p1 r p1 + r p2 r p1 r p2 + r p1 r p2 /(r p2 + r p1 ) () 1 + 1/n figure 7. back-termination using positive feedback + r bt r f r g r p r p r g r l r l ? i v a ? a v i ? o v o + r bt 1886 f08 r f r l n = v o v i n = 1 2 for r bt = r f r p r f r p + r f r g 1 + 1 r f r p 1 () figure 8. back-termination using differential positive feedback
13 LT1886 applicatio s i for atio wu u u table 2 compares the two approaches. it may seem that the low power design is a clear choice, but there are further system issues to consider. in addition to driving the line, the amplifiers provide back-termination for signals that are received simultaneously from the line. in order to reject the drive signal, a receiver circuit is used such as shown in figure 10. taking advantage of the differential nature of the signals, the receiver can subtract out the drive signal and amplify the received signal. this method works well for standard back-termination. if the back- termination resistors are reduced by positive feedback, a portion of the received signal also appears at the amplifier outputs. the result is that the received signal is attenuated + 8.45 1k 523 1.21k 1.21k 523 1 f ? i v i a v = 10 + 8.45 1886 f09 1k 1:1 100 r bt ? a v a ? l v l r bt 1886 f10 1:n r l + v bias v rx + lt1813 + lt1813 r f r f r g r d r g r d r l n 2 = reflected impedance r l 2n 2 r l 2n 2 = attenuation of v a + r bt r l 2n 2 r l 2n 2 r g r d = set + r bt figure 9. power saving adsl modem driver figure 10. receiver configuration table 2. adsl upstream driver designs standard low power line impedance 100 w 100 w line power 13dbm 13dbm peak-to-average ratio 5.33 5.33 transformer turns ratio 2 1 reflected impedance 25 w 100 w back-termination resistors 12.5 w 8.35 w transformer insertion loss 1db 0.5db average amplifier swing 0.79v rms 0.87v rms average amplifier current 31.7ma rms 15ma rms peak amplifier swing 4.21v peak 4.65v peak peak amplifier current 169ma peak 80ma peak total average power consumption 550mw 350mw supply voltage single 12v single 12v by the same amount as the reduction in the back-termina- tion resistor. taking into account the different transformer turns ratios, the received signal of the low power design will be one third of the standard design received signal. the reduced signal has system implications for the sensi- tivity of the receiver. the power reduction may, or may not, be an acceptable system tradeoff for a given design. demo board demo board dc304 has been created to provide a versatile platform for a line driver/receiver design. (figure 11 shows a complete schematic.) the board is set up for either single or dual supply designs with jumpers 1C4. the LT1886 is set up for differential, noninverting gain of 3. each amp is configured as in figure 5 for maximum flexibility. the amplifiers drive a 1:2 transformer through back-termina- tion resistors that can be reduced with optional positive feedback. the secondary of the transformer can be iso- lated from the primary with jumper 5. a differential receiver is included using the lt1813, a dual 100mhz, 750v/ m s operational amplifier. the receiver gain from the transformer secondary is 2, and the drive signals are rejected by approximately a factor of 14db. other optional components include filter capacitors and an rc snubber network at the transformer primary.
14 LT1886 applicatio s i for atio wu u u rcv + LT1886 v + v + v r5 1k r9 12.4 r10 12.4 r7 12.4 r18 r19 2 1 8 3 5 7 4 8 6 c9 470pf c8 0.1 f v + c12 0.1 f + LT1886 3 1 2 + lt1813 r7 1k tp1 tp3 tp2 tp5 tp4 r20 130 c19 100pf r4 130 c20 100pf r6 499 c4 1 f r8 499 r3 20k r4 20k c5 1 f c11 0.1 f c10 470pf c3 1 f c15 1 f c14 10 f 1886 f11 gnd v + v + r11 4.02k r12 2k r13 1k +rcv drv 4 v c13 0.1 f 6 7 5 + lt1813 c6 10pf c23 470pf r15 2k r16 1k r14 4.02k c7 10pf jp3 jp2 jp4 jp5 separate secondary ground line out c2 0.1 f +drv jp1 c1 0.1 f r1 10k r2 10k + c17 1 f c16 10 f + c18 10 f v 6 4 9 7 10 2 tp6 c21 470pf c22 470pf coilcraft x8390-a or equivalent figure 11. LT1886, lt1813 dsl demo board (dc304)
15 LT1886 sche atic w w si plified d1 q2 i 1 c1 q1 q8 out q6 ?n v + v +in q4 q5 q7 q9 1886 ss q3 d2 i 2 i 3 i 4 package descriptio u dimensions in inches (millimeters) unless otherwise noted. 0.016 ?0.050 (0.406 ?1.270) 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) so8 1298 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) typ 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) bsc 1 2 3 4 0.150 ?0.157** (3.810 ?3.988) 8 7 6 5 0.189 ?0.197* (4.801 ?5.004) 0.228 ?0.244 (5.791 ?6.197) dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * ** s8 package 8-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
16 LT1886 part number description comments lt1207 dual 250ma, 60mhz current feedback amplifier shutdown/current set function lt1361 dual 50mhz, 800v/ m s op amp 15v operation, 1mv v os , 1 m a i b lt1396 dual 400mhz, 800v/ m s current feedback amplifier 4.6ma supply current set, 80ma i out lt1497 dual 125ma, 50mhz current feedback amplifier 900v/ m s slew rate lt1795 dual 500ma, 50mhz current feedback amplifier shutdown/current set function, adsl co driver lt1813 dual 100mhz, 750v/ m s, 8nv/ ? hz op amp low noise, low power differential receiver ? linear technology corporation 1999 1886f lt/tp 0400 4k ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear-tech.com related parts typical applicatio u + 6.19 1 8 5v 4 ?v 1k 866 2k 2k 866 + v in + v l *coilcraft x8390-a or equivalent + 6.19 1/2 LT1886 1/2 LT1886 1886 ta02 1k 100pf 1:2* 100 130 3 2 7 6 5 100pf 130 = 5 (assume 0.5db transformer power loss) reflected line impedance = 100 / 2 2 = 25 effective termination = 2 ?6.19 ? each amplifier: 0.56v rms , 29.9ma rms 3v peak, 160ma peak = 24.8 v l v in 2k 1k split supply 5v adsl cpe line driver

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